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High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip

169,38 
169,38 
2025-07-31 169.3800 InStock
Nemokamas pristatymas į paštomatus per 18-22 darbo dienų užsakymams nuo 19,00 

Knygos aprašymas

This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures. 

Informacija

Autorius: Anupam Chattopadhyay, Zheng Wang,
Serija: Computer Architecture and Design Methodologies
Leidėjas: Springer Nature Singapore
Išleidimo metai: 2017
Knygos puslapių skaičius: 220
ISBN-10: 9811010722
ISBN-13: 9789811010729
Formatas: Knyga kietu viršeliu
Kalba: Anglų
Žanras: Electronics: circuits and components

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