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Low Power Wallace Multiplier: A Design Prospective

57,42 
57,42 
2025-07-31 57.4200 InStock
Nemokamas pristatymas į paštomatus per 16-20 darbo dienų užsakymams nuo 19,00 

Knygos aprašymas

Multipliers are basic building blocks of many VLSI computational units. The performance of such VLSI circuits depends on the performance of multipliers. A multiplier is also one of the key hardware blocks in most digital signal processing (DSP) systems. Typical in DSP applications, where a multiplier plays an important role include digital filtering, digital communications and spectral analysis. Since multipliers are rather complex circuits and must typically operate at a high system clock rate, reducing the delay of a multiplier is an essential part of satisfying the overall design. So designing a fast multiplier is a challenging task for VLSI designers. There are various types of multipliers are available such as the array multiplier, carry-save multiplier, Wallace-tree multiplier, etc. Among this Wallace-tree multiplier or Wallace multiplier has been a very popular design due to its fast speed and low power. In this book, a design prospective of a low power Wallace Multiplier has been presented.

Informacija

Autorius: Inamul Hussain, Saurabh Choudhury, Manish Kumar,
Leidėjas: LAP LAMBERT Academic Publishing
Išleidimo metai: 2020
Knygos puslapių skaičius: 64
ISBN-10: 6200783411
ISBN-13: 9786200783417
Formatas: Knyga minkštu viršeliu
Kalba: Anglų
Žanras: Electronics and communications engineering

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