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Performance Analysis and Numerical Investigation of JLDG VeSFET

103,49 
103,49 
2025-07-31 103.4900 InStock
Nemokamas pristatymas į paštomatus per 16-20 darbo dienų užsakymams nuo 19,00 

Knygos aprašymas

Exponential growth in portable electronic system requires more and more functionality to be united in modern VLSI silicon chip. Junctionless transistors, therefore, help the chip makers continue to make smaller and smaller devices in order to improve the performance of a chip. JLDG VeSFET offers a novel concept which not only provide new 3-D integration friendly manufacturing but a unique design paradigm which provides effective electrostatic control over the channel and supreme reduction of short channel effects. A complete analysis of the aforementioned device is presented here with a view to meet the needs of next generation IC technology.

Informacija

Autorius: Tarun Chaudhary, Gargi Khanna,
Leidėjas: LAP LAMBERT Academic Publishing
Išleidimo metai: 2019
Knygos puslapių skaičius: 200
ISBN-10: 613999795X
ISBN-13: 9786139997954
Formatas: Knyga minkštu viršeliu
Kalba: Anglų
Žanras: Electronics and communications engineering

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